 |
"The
computer book of the month is The Bios Companion by Phil Croucher.
Long-time readers of this column will recall I have recommended his
book before. This tells you everything you ought to know about the
BIOS in your system. Post codes, options, upgrades, you name it.
Years ago, I called an earlier edition of this invaluable and I see
no reason to change my view. Recommended."
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Byte Magazine
"Croucher's book was invaluable 20 years ago and remains so today...... Every one of the 468 pages holds useful information, the author having zero tolerance for padding."
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PC Plus Magazine
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Jeremy Fleming
"His style is lovely: clear, jargon-free where possible, chatty and friendly with beautiful short paragraphs. It [Communications & Networks] joins my list of 'I wish I'd written it' books. I haven't come across such a good subject book in a long time at this price."
Lorna Kyle Personal Computer World
"To any micro owner who wants to know what this comms business is all about, [Communications & Networks] is certainly one of the best around. ... Croucher is not only knowledgable about his subject, he's interested in it and communicates that interest to you. "
Ron Peck New Computer Express
"There are few books about which explain as accurately and comprehensively as [Communications & Networks] does what communications are all about. The glossary is excellent."
Micro Decision
"...any PC user with a genuine interest in using his machine to its full potential will recognise [Communications & Networks] for the completely invaluable tool and often the inspiration that it is."
Yvonne Taylor Which PC
"[Communications & Networks] is the type of book you can read on a bus or train without getting a headache from trying to understand what it means."
Network
"As a recently reformed computer illiterate myself, I appreciated the author's straighforward yet humourous and light-hearted style of writing. He manages to strike the balance between too much and too little information. ... [Computing Under Protest] is never in danger of either boring or confusing the reader."
Emma Tyrrall Practical PC
"Good documentation is important for any software, but even more so for an operating system - the documentation [for DOS 386 Professional] has some exceptionally clear explanations. Altogether, the documentation is an example of the right way of doing things, and other software manufacturers would do well to take note."
Matthew Holbrook Computer Shopper
"The DOS 386 Professional manual sets arrived at 2130 local time today. We have had a brief look at them and wish to congratulate IMS on the excellent, clear and concise manner in which they have been presented."
Fred Parker ETL Soft
"I remain impressed by Mr. Croucher's fluid writing style, practical orientation, enthusiasm, and strong technical knowledge."
Lance A Leventhal Slawson Communications, Inc
|


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"(The) Book is quite a good compliment to our notes for students. We will
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|
| |
|
|
|
Award POST Codes
The general procedures below are valid for
greater than XT v3.0 and AT v3.02-4.2. The sequence may vary slightly
between versions. If a failure occurs between 6- FF (unless it causes
the computer to hang in the test), the system will keep outputting
the POST sequence to the defined POST port. A normal error message
will then be displayed on the screen when video is available.
EISA codes typically go to 300h. ISA codes
to 80h.
Note: Not all POST codes are included
below - the latest information is in the The
BIOS Companion, which contains over 100 pages of them.
Test
Sequence before v4.2

| CPU |
BIOS
sets, verifies and resets the error flags in the CPU.
Failure here is normally due to the CPU or system clock |
| POST
Determination |
BIOS
determines whether the motherboard is set for normal operation
or a continuous loop of POST. If the POST test is
cycled 1-5 times over and over either the jumper for this
function is set to burn=in or the circuitry involved has
failed |
| Keyboard
Controller |
BIOS
tests the internal operations of the keyboard controller
chip (8042). Failure here is normally due to the
keyboard chip |
| Burn
In Status |
1-5
will repeat if the motherboard is set to burn in.
If you haven't set the motherboard for burn-in mode, there
is a short in the circuitry |
| Initialize
Chipset |
BIOS
clears all DMA registers and CMOS status bytes 0E and 0F.
BIOS then initializes 8254 timer, Failure of this
test is probably due to the timer chip |
| CPU |
A
bit-pattern is used to verify the functioning of the CPU
registers. Failure here is normally down to the CPU
or clock chip |
| RTC |
BIOS
verifies that the real time clock is updating CMOS at normal
intervals. Failure is normally the CMOS/RTC or the
battery |
| ROM
BIOS Checksum |
BIOS
performs a checksum of itself against a predetermined value
that will equal 00. Failure is down to the ROM BIOS |
| Initialize
Video |
BIOS
tests and initializes the video controller. Failure
is normally the video controller (6845) or an improper setting
of the motherboard or CMOS |
| PIT |
BIOS
tests the functionality of channels 0, 1, and 2 in sequence.
Failure is normally the PIT chip (8254/53) |
| CMOS
Status |
Walking
bit pattern tests CMOS shutdown status byte 0F. Failure
normally in CMOS |
| Extended
CMOS |
BIOS
checks for any extended information of the chipset and stores
it in the extended RAM area. Failure is normally due
to invalid information and can be corrected by setting CMOS
defaults. Further failure indicates either the chipset
or the CMOS RAM |
| DMA |
Channels
0 and 1 are tested together with the page registers of the
DMA controller chip (8237). Failure is normally due
to the DMA chips |
| Keyboard |
The
8042 keyboard controller is tested for functionality and
for proper interfacing functions. Failure is normally
due to the 8042 chip |
| Refresh |
Memory
refresh is tested; the standard with walking - bit patterns.
Failure is normally the PIT chip in AT's or the DMA chip
in AT's |
| Memory |
The
first 64K of memory is tested with walking bit patterns.
Failure is normally due to the first bank of ram or a data
line |
| Interrupt
Vectors |
The
BIOS interrupt vectors table is loaded to the first bank
of RAM. Failure here is not likely since memory in
the area has been tested. If failure does occur suspect
the BIOS or RTC |
| Video
ROM |
Video
ROM is initialized which performs an internal diagnostic
before returning control to the system BIOS. Failure
is normally the video adapter or the BIOS |
| Video
Memory |
This
is tested with a bit pattern. This is bypassed if
there is a ROM on the video adapter. Failure is normally
down to the memory on the adapter |
| PIC |
The
functionality of the interrupt controller chip(s) is tested
(8259). Failure is normally due to the 8259 chips
but may be the clock |
| CMOS
Battery |
BIOS
verifies that CMOS byte 0D is set which indicates the CMOS
battery power. Suspect the battery first and the CMOS
second |
| CMOS
Checksum |
A
checksum is performed on the CMOS. Failure is either
incorrect setup, the CMOS chip or battery. If the
test is passed, the information is used to configure the
system |
| Determine
System Memory |
Memory
up to 640K is addressed in 64K blocks. Failure is
normally due to an address line or DMA chip. If all
the memory is not found there is a bad RAM chip or address
line in the 64K block above the amount found |
| Memory
Test |
Tests
are performed on any memory found and there will normally
be a message with the hex address of any failing bit displayed
at the end of boot |
| PIC |
Further
testing is done on the 8259 chips |
| CPU
Protected Mode |
The
processor is placed in protected mode and back into real
mode; the 8042 is used for this. In case of failure
suspect the 8042, CPU, CMOS, or the BIOS in that order |
| Determine
Extended Memory |
Memory
above 1MB is addressed in 64K blocks. The entire block
will be inactive if there is a bad RAM chip on a block |
| Test
Extended Memory |
Extended
memory is tested with a series of patterns. Failure
is normally down to a RAM chip, and the hex address of the
failed bit should be displayed |
| Unexpected
Exceptions |
BIOS
checks for unexpected exceptions in protected mode.
Failure is likely to be a TSR or intermittent RAM failure |
| Shadow
Cache |
Shadow
RAM and cache are activated. Failure may be due to
the cache controller or chips. Check the CMOS first
for invalid information |
| 8242
Detection |
BIOS
checks for an Intel 8242 keyboard controller and initializes
it if found. Failure may be due to an improper jumper
setting or the 8242 |
| Initialize
Keyboard |
Failure
could be the keyboard or controller |
| Initialize
floppy |
All
those set in the CMOS. Failure could be incorrect
CMOS setup or floppy controller or the drive |
| Detect
Serial Ports |
BIOS
searches for and initializes up to four serial ports at
3F8, 2F8, 3E8, and 2E8. Detection failure is normally
due to an incorrect jumper setting somewhere or an adapter
failure |
| Detect
Parallel Ports |
BIOS
searches for and initializes up to four parallel ports at
378, 278, 3BC, and 2BC. Detection failure is normally
due to an incorrect jumper setting somewhere or an adapter
failure |
| Initialize
Hard Drive |
BIOS
initializes any hard drive(s) set in the CMOS. Failure
could be due to invalid CMOS setup, hard drive or controller
failure |
| Detect
NPU Coprocessor |
Initialization
of any NPU coprocessor found. failure is due either
to invalid CMOS setup or the NPU is failing |
| Initialize
Adapter ROM |
Any
Adapter ROM's between C800 and EFFF are initialized.
The ROM will do an internal test before giving back control
to the system ROM. Failure is normally due to the
adapter ROM or the attached hardware |
| Initialize
External Cache |
Any
external cache to the 486 is enabled. Failure would
indicates invalid CMOS setup, cache controller or chip failure |
| NMI
Unexpected Exceptions |
A
final check for unexpected exceptions before giving control
to the Int 19 boot loader. Failure is normally due
to a memory parity error or an adapter failure |
| Boot
Errors |
Failure
when the BIOS attempts to boot off the default drive set
in CMOS is normally due to invalid CMOS drive setup or as
given by an error message. If the system hangs there
is an error in the Master Boot Record or the Volume Boot
Record |
Back to Top
Test
Sequence after 4.2

| CPU |
BIOS
sets, verifies and resets the error flags in the CPU then
performs a register test by writing and reading bit patterns.
Failure is normally due to the CPU or clock chip |
| Initialize
Support Chips |
Video
is disabled as is parity, DMA and NMI. Then the PIT,
PIC, and DMA chips are initialized. Failure is normally
the DMA or PIT chips |
| Initialize
Keyboard |
Keyboard
and controller are initialized |
| ROM
BIOS Test |
A
checksum is performed by the ROM BIOS on the data within
itself and is compared to a preset value of 00. Failure
is normally due tot he ROM BIOS |
| CMOS
Test |
A
test of the CMOS chip which should also detect a bad battery.
Failure is due to either the CMOS chip or the battery |
| Memory
Test |
First
356K of memory tested with any routines in the chipsets.
Failure is normally due to defective memory |
| Cache
Initialization |
Any
external cache to the chipset in activated. Failure
is normally due to the cache controller or chips |
| Initialize
Vector Table |
Interrupt
vectors are initialized and the interrupt table is installed
into low memory. Failure is normally due to the BIOS
or low memory |
| CMOS
RAM |
CMOS
RAM checksum tested and BIOS defaults loaded if invalid.
Failure would indicate CMOS RAM failure |
| Keyboard
Initialization |
Keyboard
initialized and Num Lock set on. Check the keyboard
or controller is a failure occurs |
| Video
Test |
Video
adapter tested and initialized |
| Video
Memory |
Tested
for Mono and CGA adapters. Failure could be the adapter
card |
| DMA
Test |
DMA
controllers and page registers are tested. Failure
could indicate bad DMA chips |
| PIC
Tests |
8259
PIC chips are tested. Failure would indicate a bad
PIC |
| EISA
Mode Test |
A
checksum is performed on the extended data area of CMOS
where EISA information is stored. If passed the EISA
adapter is initialized |
| Enable
Slots |
Slots
0-15 doe EISA adapters are enabled if the above test is
passed |
| Memory
Size |
Memory
addresses above 256K written in 64K blocks and addresses
found are initialized. If a bit is bad, the entire
block containing it and those above will not be seen |
| Memory
Test |
Read
and write tests are performed on memory above 256K.
Failure is due to bad bit in RAM |
| EISA
Memory |
Memory
tests on any adapters initialize previously. Check
the memory chips if a failure occurs |
| Mouse
Initialization |
Checks
for a mouse and installs the appropriate interrupt vectors
if one is found. Check the mouse adapter if a failure
occurs |
| Cache
Initialized |
The
cache controller is initialized if present |
| Shadow
RAM Setup |
Any
Shadow RAM present according to the CMOS is enabled |
| Floppy
Test |
Test
and initialize floppy controller and drive |
| Hard
Drive Test |
Test
and initialize hard disk controller and drive. You
may have an improper setup or a bad controller/hard drive
if a failure occurs |
| Serial
and Parallel Ports |
Amy
serial and parallel ports are found and initialized |
| Math
Coprocessor |
The
coprocessor is initialized if found. Check the CMOS
setup or the math coprocessor if a failure occurs |
| Boot
Speed |
Set
the default speed at which the computer boots |
| POST
Loop |
Reboot
occurs if the loop pin is set for manufacturing purposes |
| Security |
Ask
for a password if one has been set in the CMOS. |
| Write
CMOS |
The
BIOS is waiting to write the CMOS values from Setup to CMOS
RAM. Failure is normally due to an invalid CMOS configuration |
| Pre-Boot |
The
BIOS is waiting to to write the CMOS values from Setup to
CMOS RAM |
| Adapter
ROM Initialization |
Adapter
ROM's between C800 and EFFF are Initialized. The ROM
will do an internal test before giving back control to the
system ROM. Failure is normally due to the adapter
ROM or the adapter card |
| Setup
Time |
Set
CMOS time to the value located at 40h of the BIOS data area |
| Boot
System |
Control
is given to Int 19 boot loader |
Back to Top
Text
Messages

| BIOS
ROM checksum error - System halted |
The
checksum of the BIOS code in the BIOS chip is incorrect,
indicating the BIOS code may have become corrupt.
Replace the BIOS |
| CMOS
battery failed |
CMOS
battery is no longer functional. Replace the battery |
| CMOS
checksum error - Defaults loaded |
Checksum
of CMOS is incorrect, so the system loads the default values.
A checksum error may indicate that CMOS has become corrupt.
This error might have been caused by a weak battery |
| CMOS
CHECKSUM ERROR DISK BOOT FAILURE, INSERT SYSTEM DISK AND
PRESS ENTER |
Checksum
of CMOS is incorrect. This can indicate that
CMOS has become corrupt. This error may have been
caused by a weak CMOS battery |
| CPU
at nnn |
Displays
the running speed of the CPU |
| DISKETTE
DRIVES OR TYPES MISMATCH ERROR - RUN SETUP |
Type
of diskette drive installed in the system is different from
the CMOS definition. Run Setup to reconfigure the
drive type correctly |
| Display
switch is set incorrectly |
The
display switch on the motherboard can be set to either monochrome
or color. This message indicates the switch is set
to a different setting than indicated in Setup. Determine
which setting is correct and then either turn off the system
and change the jumper or enter Setup and change the video
selector |
| DISPLAY
TYPE HAS CHANGED SINCE LAST BOOT |
Since
last powering off the system, the display adapter has been
changed. You must configure the system for the new
display type |
| EISA
Configuration Checksum Error |
The
EISA nonvolatile RAM checksum is incorrect or cannot correctly
read the EISA slot. This can indicate either the EISA
nonvolatile memory has become corrupted or the slot has
been configured incorrectly. Also, be sure the card
in installed firmly in the slot |
| EISA
Configuration Is Not Complete |
The
slot configuration information stored in the EISA nonvolatile
memory is incomplete |
| ERROR
ENCOUNTERED INITIALIZING HARD DRIVE |
Hard
drive cannot be initialized. Be sure the adapter
is installed correctly and all cables are correctly and
firmly attached. Also be sure the correct hard drive
type is selected in Setup |
| ERROR
INITIALIZING HARD DISK CONTROLLER |
Cannot
initialize controller. Make sure the card is correctly
and firmly installed in the bus. Be sure the correct
hard drive type is installed in Setup. Also check
to see if any jumper needs to be set correctly on the hard
drive |
| FLOPPY
DISK CONTROLLER ERROR OR NO CONTROLLER PRESENT |
Cannot
find or initialize the floppy disk controller. make
sure the controller is installed correctly and firmly.
If there are no floppy drives installed, be sure the Diskette
Drive selection in Setup is set to None |
| Floppy
disk(s) fail |
Cannot
find or initialize the floppy drive controller or the drive.
make sure the controller is installed correctly.
If no floppy drives are installed, be sure the Diskette
Drive selection in Setup is set to None or Auto |
| HARD
DISK initializing |
Please
wait for a moment... Some hard drives require some extra
time to initialize |
| HARD
DISK INSTALL FAILURE |
Cannot
find or initialize the hard drive controller or the drive.
Make sure the controller is installed correctly. If
no hard drives are installed, be sure the Hard Drive selection
in Setup is set to None |
| Hard
disk(s) diagnosis fail |
The
system may run specific disk diagnostic routines.
this message appears if one or more hard disks return an
error when the diagnostics run |
| Invalid
EISA Configuration |
The
nonvolatile memory containing EISA configuration information
was programmed incorrectly or has become corrupt.
Rerun EISA configuration utility to correctly program the
memory |
| Keyboard
error or no keyboard present |
Cannot
initialize the keyboard. Make sure the keyboard is
attached correctly and no keys are being pressed during
the boot. If you are purposely configuring the system
without a keyboard, set the error halt condition in Setup
to HALT ON ALL, BUT KEYBOARD. This will cause the
BIOS to ignore the missing keyboard and continue the boot |
| Keyboard
is locked out - Unlock the key |
This
message usually indicates that one or more keys have been
pressed during the keyboard tests. Be sure no objects
are resting on the keyboard |
| Memory
Address Error at... |
Indicates
a memory address error at a specific location. You
can use this location along with the memory map for your
system to find and replace the bad memory chips |
| Memory
parity Error at... |
Indicates
a memory parity error at a specific location. You
can use this location along with the memory map for your
system to find and replace the bad memory chips. |
| MEMORY
SIZE HAS CHANGED SINCE LAST BOOT |
Memory
has been added or removed since the last boot. In
EISA mode, use configuration utility to reconfigure the
memory configuration. In ISA mode,enter Setup and
enter the new memory size in the memory field |
| Memory
Test |
The
message displays during a full memory test, counting down
the memory areas being tested |
| Memory
Test Fail |
If
POST detects an error during memory testing, additional
information appears giving specifics about the type and
location of the memory error |
| Memory
Verify Error at... |
Indicates
an error verifying a value already written to memory.
Use the location along with your system's memory map to
locate the bad chip |
| No
boot device was found |
This
could mean that either a boot device was not detected or
the drive does not contain proper system boot files.
Insert a system disk into drive A: and press Enter.
If you assumed the system would boot from the hard drive,
make sure the controller is inserted correctly and all cables
are properly attached. Also be sure the disk is formatted
as a boot device. Then reboot the system |
| OFFENDING
ADDRESS NOT FOUND |
The
message is used in conjunction with the I/O CHANNEL CHECK
and RAM PARITY ERROR messages when the segment that has
caused the problem cannot be isolated |
| OFFENDING
SEGMENT: |
This
message is used in conjunction with the I/O CHANNEL CHECK
and RAM PARITY ERROR messages when the segment that has
caused the problem has been isolated |
| Override
enabled - Defaults loaded |
If
the system cannot boot using the current CMOS configuration,
the BIOS can override the current configuration with a set
of BIOS defaults designed for the most stable, minimal-performance
system operations |
| PRESS
A KEY TO REBOOT |
This
will be displayed at the bottom of the screen when an error
occurs that requires you to reboot. Press any key
to reboot the system |
| Press
ESC to skip memory test |
You
can press ESC to skip the full memory test |
| PRESS
F1 TO DISABLE NMI, F2 TO REBOOT |
When
BIOS detects a non-maskable interrupt condition during boot,
this will allow you to disable the NMI and continue to boot;
or you can reboot the system with the NMI enabled |
| Press
TAB to show POST screen |
System
OEM's may replace the Award BIOS POST display with their
own proprietary display. Including this message in
the OEM display permits the operator to switch between the
OEM display |
| Primary
master hard disk fail |
POST
detects an error in the primary master IDE hard drive |
| Primary
slave hard disk fail |
POST
detects an error in the secondary master IDE hard drive |
| RAM
PARITY ERROR - CHECKING FOR SEGMENT... |
Indicates
a parity error in RAM |
| Resuming
from disk, Press TAB to show POST screen |
Award
offers a save-a-disk feature for notebook computers.
This message may appear when the operator restarts the system
after a save-to-disk shutdown. See the Press Tab...message
earlier for a description of this feature |
| Secondary
master hard disk fail |
POST
detects an error in the secondary master IDE hard drive |
| Secondary
slave hard disk fail |
POST
detects an error in the secondary slave IDE hard drive |
| Should
Be Empty But EISA Board Found |
A
valid board ID was found in a slot that was configured as
having no board ID |
| Should
Have EISA Board But Not Found |
The
board installed is not responding to the ID request, or
no board ID has been found in the indicated slot |
| Slot
Not Empty |
Indicates
that a slot designated as empty by the EISA configuration
utility actually contains a board |
| SYSTEM
HALTED. (CTRL-ALT-DEL) TO REBOOT... |
Indicates
the present boot attempt has been aborted and the system
must be rebooted. Press and hold down the Ctrl and
Alt keys and press Del |
| Wrong
Board In Slot |
The
board ID does not match the ID stored in the EISA nonvolatile
memory |
Back to Top
Basic
XT

| 03 |
Flag
resister test |
| 06 |
CPU
register test |
| 09 |
System
hardware initialization |
| 0C |
BIOS
checksum |
| 0F |
DMA
page register initialization |
| 12 |
Test
DMA address and count registers |
| 15 |
DMA
initialization |
| 18 |
Timer
test |
| 1B |
Timer
initialization |
| 1E |
Start
RAM initialization |
| 21 |
Test
base 64K of RAM |
| 24 |
Setup
init. and temp stack |
| 27 |
Initialize
PIC |
| 2A |
Interrupt
mask register test |
| 2D |
Hot
interrupt test |
| 30 |
V40
DMA if present |
| 33 |
Verify
system clock initialization |
| 36 |
Keyboard
test |
| 39 |
Setup
interrupt table |
| 3C |
Read
system configuration switches |
| 3F |
Video
test |
| 42 |
Serial
port determination |
| 45 |
Parallel
port determination |
| 48 |
Game
port determination |
| 4B |
Copyright
message display |
| 4E |
Calculation
of CPU speed |
| 54 |
Test
of system memory |
| 55 |
Floppy
drive test |
| 57 |
System
initialized before boot |
| 5A |
Call
to Int 19 |
Back to Top
XT
v3.1

| 01 |
Processor
test fail; Processor status verification #1 |
| 02 |
Type
of POST/keyboard buffer; Failed if the keyboard interface
buffer is filled with data |
| 06 |
Initialize
6845 video controller, 8237 DMA controller, 8259 PIC, 8253
timer channel channel 1 initialized; Reset math coprocessor;
Disable color and mono video, parity circuits and DMA chips;
Clear DMA chips and page registers |
| 07 |
Process
registers except SS, SP, BP with data patterns 00 and FF;
Processor status verification #2 |
| 09 |
ROM
checksum for 32K tested |
| 0A |
Initialize
the 6845 video controller |
| 15 |
Test
first 64K of system memory |
| 16 |
Set
up interrupt table in first 64K |
| 17 |
Set
up video I/O operations |
| 18 |
Test
video memory |
| 19 |
8259
mask bits-channel 1 |
| 1A |
8259
mask bits-channel 2 |
| 1D |
Setup
configuration byte from CMOS |
| 1E |
Size
memory and compare with CMOS |
| 1F |
Test
base memory; Test found system memory |
| 20 |
Test
stuck 8259's Interrupt bits |
| 21 |
Test
stuck NMI parity I/O bits |
| 22 |
8259
Interrupt functionality tested |
| 2A |
Keyboard
initialized |
| 2B |
Floppy
dive controller and drive initialized |
| 2C |
Initialize
COM ports |
| 2D |
Initialize
LPT ports |
| 2F |
Initialize
math coprocessor |
| 31 |
Initialize
option ROM's |
| FF |
Int.
19 boot attempt |
Back to Top
XT
v3.3

| 01-05 |
Keyboard
controller 8042 tested |
| 06 |
On-board
LSI initialized |
| 07 |
CPU
flags tested |
| 08 |
Calculate
CMOS checksum |
| 09 |
Initialize
the 8254 PIT |
| 0A |
8254
PIC tested |
| 0B |
DMA
controller tested |
| 0C |
8259
PIC initialized |
| 0D |
8259
PIC tested |
| 0E |
ROM
BIOS checksum tested |
| 0F |
Extended
CMOS tested |
| 10 |
8259
PIC tested |
| 11 |
8259
PIC tested |
| 12 |
8259
PIC tested |
| 13 |
8259
PIC tested |
| 14 |
8259
PIC tested |
| 15 |
First
64K RAM tested |
| 16 |
Interrupt
vector tables initialized |
| 17 |
Video
initialization |
| 18 |
Video
memory tested |
| 19 |
Interrupt
line mask 8259 PIC tested |
| 1A |
Interrupt
line mask 8259 PIC tested |
| 1B |
Battery
good |
| 1C |
CMOS
checksum verified |
| 1D |
CMOS
chip/RTC verified |
| 1E |
Memory
size checked |
| 1F |
Memory
verified |
| 20 |
DMA
initialized |
| 21 |
PIC
initialized |
| 22 |
PIT
initialized |
| 24 |
Extended
memory size checked |
| 25 |
Extended
memory tested |
| 26 |
Protected
mode entered |
| 27 |
Shadow
RAM, cache controller initialized |
| 28 |
Shadow
RAM, cache controller tested |
| 29 |
Reserved |
| 2A |
Initialize
keyboard |
| 2B |
Floppy
drive initialization |
| 2C |
Serial
port initialization |
| 2D |
Parallel
port initialization |
| 2E |
Hard
disk initialization |
| 2F |
Math
coprocessor |
| 30 |
Reserved |
| 31 |
Optional
ROM's checked for |
| FF |
Boot
from Int 19 |
Back to Top
EISA
BIOS

| 01 |
CPU
flags |
| 02 |
CPU
registers |
| 03 |
Initialize
DMA, PIC, PIT |
| 04 |
Memory
refresh |
| 05 |
Keyboard
initialization |
| 06 |
ROM
checksum |
| 07 |
CMOS,
battery |
| 08 |
256K
memory |
| 09 |
Cache |
| 0A |
Set
Interrupt table |
| 0B |
CMOS
checksum |
| 0C |
Keyboard
initialization |
| 0D |
Video
adapter |
| 0E |
Video
memory |
| 0F |
DMA
channel 0 |
| 10 |
DMA
channel 1 |
| 11 |
DMA
page register |
| 14 |
Timer
chip |
| 15 |
PIC
controller 1 |
| 16 |
PIC
controller 0 |
| 17 |
PIC
stuck bits |
| 18 |
PIC
maskable IRQ's |
| 19 |
NMI
bit check |
| 1F |
CMOS
XRAM |
| 20 |
Slot
0 |
| 21 |
Slot
1 |
| 22 |
Slot
2 |
| 23 |
Slot
3 |
| 24 |
Slot
4 |
| 25 |
Slot
5 |
| 26 |
Slot
6 |
| 27 |
Slot
7 |
| 28 |
Slot
8 |
| 29 |
Slot
9 |
| 2A |
Slot
10 |
| 2B |
Slot
11 |
| 2C |
Slot
12 |
| 2D |
Slot
13 |
| 2E |
Slot
14 |
| 2F |
Slot
15 |
| 30 |
Memory
size 256K |
| 31 |
Memory
test over 256K |
| 32 |
EISA
memory |
| 3C |
CMOS
setup |
| 3D |
Mouse/adapter,
CMOS |
| 3E |
Cache
RAM |
| 3F |
Shadow
RAM |
| 41 |
Floppy
drive |
| 42 |
Hard
drive |
| 43 |
RS232
parallel |
| 45 |
NPU |
| 47 |
Speed |
| 4E |
Manufacturing
loop |
| 4F |
Security |
| 50 |
CMOS
update |
| 51 |
Enable
NMI, cache |
| 52 |
Adapter
ROM's |
| 53 |
Set
time |
| 60 |
Virus
protection setup |
| 61 |
Boot
speed |
| 62 |
Numlock
setup |
| 63 |
Boot |
| B0 |
NMI
in protected |
| B1 |
Disable
NMI |
| BE |
Chipset
default initialization |
| BF |
Chipset
program |
| C0 |
Cache
on/off |
| C1 |
Memory
size |
| C2 |
Base
256K test |
| C3 |
DRAM
page select |
| C4 |
Video
switch |
| C5 |
Shadow
RAM |
| C6 |
Cache
program |
| C8 |
Speed
switch |
| C9 |
Shadow
RAM |
| CA |
OEM
chipset |
| FF |
Boot |
Back to Top
ISA/EISA
Version 4.0

| 01 |
CPU
flags tested; Processor test #1 |
| 02 |
CPU
registers tested; Processor test #2; Verify all CPU registers
except SS, SP, BP with data patterns 00 and FF |
| 03 |
Initialize
DMA, PIC, PIT; Calculate BIOS EPROM and sign on message checksum
(fail if not 0) |
| 04 |
Memory
refresh initialized; Test CMOS RAM interface |
| 05 |
Keyboard
initialization; Initialize NMI, PIE, AIE, UEI, SQWV; Disable
video, parity checking and DMA; Math coprocessor reset; Clear
all page registers and CMOS RAM shutdown byte; Initialize
timers 0, 1, 2 and set EISA timer to a known state; Initialize
DMA controllers 0 and 1; Initialize interrupt controllers
0 and 1; Initialize EISA extended registers |
| 06 |
ROM
checksum; Memory refresh tested |
| 07 |
Low
memory setup; Initialize chipset and test the presence of
memory; OEM chipset initialization; Lower 256K of memory cleared;
Enable parity checking and test parity in lower 256K memory |
| 08 |
Setup
Interrupt vector table; Initialize the first 120 Interrupt
vectors with SPURIOUS_INT_HDLR and initialize INT 00-1F according
to INT_TBL |
| 09 |
Cache;
CMOS checksum tested |
| 0A |
Set
interrupt table; Initialize keyboard; Detect keyboard controller |
| 0B |
CMOS
checksum; Video interface initialized |
| 0C |
Keyboard
initialization; Video memory tested |
| 0D |
Video
adapter initialized; OEM specific initializations |
| 0E |
Reserved |
| 0F |
DMA
channel 0 tested with AA, 55, FF, 00 bit patterns |
| 10 |
DMA
channel 1 tested with AA, 55, FF, 00 bit patterns |
| 11 |
DMA
page register tested |
| 12 |
Reserved |
| 13 |
Reserved |
| 14 |
Timer
chip 8254 PIT timer 0 counter 2 tested |
| 15 |
Verify
8259 PIC channel 1 |
| 16 |
Verify
8259 PIC channel 2 |
| 17 |
8259
PIC stuck bits tested; Turn Interrupt bits off and verify
no Interrupt mask register is on |
| 18 |
8259
PIC maskable IRQ's tested |
| 19 |
NMI
bit check tested and parity I/O checked |
| 1A |
Reserved |
| 1B |
Reserved |
| 1C |
Reserved |
| 1D |
Reserved |
| 1E |
Reserved |
| 1F |
CMOS
XRAM checked for |
| 20 |
Slot
0 EISA initialized and enabled |
| 21 |
Slot
1 EISA initialized and enabled |
| 22 |
Slot
2 EISA initialized and enabled |
| 23 |
Slot
3 EISA initialized and enabled |
| 24 |
Slot
4 EISA initialized and enabled |
| 25 |
Slot
5 EISA initialized and enabled |
| 26 |
Slot
6 EISA initialized and enabled |
| 27 |
Slot
7 EISA initialized and enabled |
| 28 |
Slot
8 EISA initialized and enabled |
| 29 |
Slot
9 EISA initialized and enabled |
| 2A |
Slot
10 EISA initialized and enabled |
| 2B |
Slot
11 EISA initialized and enabled |
| 2C |
Slot
12 EISA initialized and enabled |
| 2D |
Slot
13 EISA initialized and enabled |
| 2E |
Slot
14 EISA initialized and enabled |
| 2F |
Slot
15 EISA initialized and enabled |
| 30 |
Memory
size below 256K |
| 31 |
Memory
test over 256K |
| 32 |
EISA
memory tested found during slot initialization |
| 3C |
CMOS
setup; Enter protected mode |
| 3D |
Mouse/adapter,
CMOS |
| 3E |
Cache
RAM |
| 3F |
Shadow
RAM |
| 41 |
Initialize
floppy drive |
| 42 |
Initialize
hard drive |
| 43 |
RS232
parallel |
| 45 |
NPU |
| 47 |
Speed
for boot set |
| 4E |
Manufacturing
loop; display any soft errors |
| 4F |
Security;
ask for password if security is enabled |
| 50 |
CMOS
update |
| 51 |
Enable
NMI, cache memory |
| 52 |
Adapter
ROM's from C8000h to EFFFFH or F7FFFh initialized |
| 53 |
Set
time value for address 40 of BIOS |
| 60 |
Virus
protection setup |
| 61 |
Boot
speed |
| 62 |
Numlock
setup |
| 63 |
Boot
from Int 19 |
| B0 |
NMI
in protected |
| B1 |
Disable
NMI |
| BE |
Chipset
default initialization |
| BF |
Chipset
program; initialization of system specific chipsets |
| C0 |
Cache
on/off |
| C1 |
Memory
size checked |
| C2 |
Base
256K tested |
| C3 |
DRAM
page select tested |
| C4 |
Video
switch |
| C5 |
Shadow
RAM tested |
| C6 |
Cache
program; configure cache memory |
| C8 |
Speed
switch |
| C9 |
Shadow
RAM tested |
| CA |
OEM
chipset initialized |
| FF |
Boot
from Int 19 |
Back to Top
PnP
BIOS

| 01 |
Reserved |
| 02 |
Reserved |
| 03 |
Initialize
EISA registers (EISA BIOS only) |
| 04 |
Reserved |
| 05 |
Keyboard
controller self-tested |
| 06 |
Reserved |
| 07 |
Verify
CMOS Read/Write |
| 09 |
OEM
specific initialization; Configure Cyrix CPU register |
| 0A |
Issue
CPU ID instruction; Initialize the first 32 interrupt vectors,
initialize Int.'s 33 to 120, power management initialization |
| 0B |
PnP
initialization; verify the RTC time, detect bad battery, read
the CMOS data into the BIOS stack area, assign I/O and memory
for any PCI devices |
| 0C |
Initialization
of BIOS data area |
| 0D |
Program
some of chipset's value; Measure the CPU for display, initialize
the video |
| 0E |
Initialize
APIC (multiprocessor BIOS only); Show startup screen message |
| 0F |
DMA
channel 0 tested |
| 10 |
DMA
channel 1 tested |
| 11 |
DMA
page registers tested |
| 12 |
Reserved |
| 13 |
Reserved |
| 14 |
Test
8254 0 counter 2 |
| 15 |
Test
8259 interrupt mask bit for channel 1 |
| 16 |
Test
8259 interrupt mask bit for channel 2 |
| 17 |
Reserved |
| 19 |
Test
8259 functionality |
| 1A |
Reserved |
| 1B |
Reserved |
| 1C |
Reserved |
| 1D |
Reserved |
| 1E |
If
an EISA NVM |
| 1F-29 |
Reserved |
| 30 |
Get
size of base and extended memory |
| 31 |
Test
base and extended memory, Test base memory from 256K to 640K
, test extended memory above 1MB |
| 32 |
Test
all on-board super I/O ports |
| 33 |
Reserved |
| 3A |
Reserved |
| 3B |
Reserved |
| 3C |
Set
flag to allow CMOS setup utility |
| 3D |
Install
PS/2 mouse |
| 3E |
Try
to turn on level 2 |
| 3F |
Reserved |
| 40 |
Reserved |
| 41 |
Initialize
floppy drive controller |
| 42 |
Initialize
hard drive controller |
| 43 |
Initialize
serial & parallel ports (PnP BIOS only) |
| 45 |
Initialize
math coprocessor |
| 46-4D |
Reserved |
| 4E |
Show
all error messages on screen |
| 4F |
Ask
for password, if needed |
| 50 |
Write
all CMOS values located in the BIOS stack back to CMOS |
| 51 |
Reserved |
| 52 |
Initialize
all ISA ROM's; PCI initializations (PCI BIOS only), PnP initialization
(PnP BIOS Only), setup shadow RAM, initialize power management |
| 53 |
If
not PnP BIOS, initialize ports; Initialize time in BIOS data
area |
| 54-5F |
Reserved |
| 60 |
Setup
virus protection for the boot sector |
| 61 |
Try
to turn on level 2 cache |
| 62 |
program
numlock & typematic speed |
| 63 |
Boot
system via Int 19h |
| B0 |
Unexpected
interrupt in protected mode |
| B1 |
Unclaimed
NMI occurred |
| BE |
Program
defaults into chipset |
| BF |
Program
remaining chipset values |
| C0 |
Init.
all standard devices with defaults |
| C1 |
Auto
detect on-board DRAM & cache |
| C3 |
Test
first 26K DRAM |
| C5 |
Copy
ROM BIOS to E000-FFFF |
| FF |
System
booting |
Back to Top
Elite
(4.51PG)

| 01 |
Processor
test; Processor status verification |
| 02 |
Processor
test 2; Read/Write and verify all CPU registers |
| 03 |
Initialize
chips; Disable NMI, PIE, AIE, UEI, SQWV. Disable video,
parity checking, DMA. Reset math coprocessor.
Clear all page registers and CMOS shutdown. Initialize
DMA controller 0 and 1. Initialize interrupt controllers
0 and 1. |
| 04 |
Test
memory refresh toggle |
| 05 |
Blank
video, initialize keyboard; Keyboard controller initialization |
| 07 |
Test
CMOS interface and battery |
| 08 |
Set
up low memory; Early chipset initialization, memory presence
test, OEM chipset routines, clear low 64K memory, test first
64K memory |
| 09 |
Early
cache initialization; Cyrix CPU specific, CPU and cache initialization |
| 0A |
Set
up interrupt vector table; Initialize first 120 interrupt
vectors |
| 0B |
Test
CMOS RAM checksum |
| 0C |
Initialize
keyboard; Detect the type of keyboard controller |
| 0D |
Initialize
video interface; Detect CPU clock, read CMOS location 14h
to find the type of video in use, detect and initialize video
adapter |
| 0E |
Test
video memory; Write sign-on message to screen, setup shadow
RAM |
| 0F |
Test
DMA controller 0; BIOS checksum test, keyboard detect and
initialization |
| 10 |
Test
DMA controller 1 |
| 11 |
Test
DMA page registers |
| 12-13
|
Reserved |
| 14 |
Test
timer counter 2 |
| 15 |
Test
8259-1 mask bits |
| 16 |
Test
8259-2 mask bits |
| 17 |
Test
stuck 8259 interrupt bits; Test stuck key |
| 18 |
Test
8259 interrupt functionality |
| 19 |
Test
stuck NMI bits (parity I/O check) |
| 1A |
Benchmark;
Display CPU clock |
| 1B-1E |
Reserved |
| 1F |
Set
EISA mode; If the EISA memory checksum is good then EISA is
initialized. If it's not good then ISA tests and clear
EISA mode flag |
| 20 |
Enable
slot 0; System board |
| 21-2F |
Enable
slots 1-15 |
| 30 |
Size
base and extended memory; Size the base memory from 256K to
640K and the extended memory above 1MB |
| 31 |
Test
base and extended memory; Test the base memory from 256K to
640K and the extended memory above 1MB using various bit patterns |
| 32 |
Test
EISA extended memory |
| 33-3B |
Reserved |
| 3C |
Setup
enabled |
| 3D |
Initialize
and install mouse if present |
| 3E |
Setup
cache controller |
| 40
|
Display
virus protect disable or enable |
| 41 |
Initialize
floppy |
| 42 |
Initialize
hard drive |
| 43 |
Detect
& Init. serial & parallel ports |
| 44 |
Reserved |
| 45 |
Detect
and Init. math coprocessor |
| 46 |
Reserved |
| 47 |
Reserved |
| 48-4D |
Reserved |
| 4E |
Mfg.
POST loop, or display messages |
| 4F |
Security
password |
| 50 |
Write
CMOS; Write CMOS back to RAM and clear screen |
| 51 |
Pre-boot
enable; Enable parity checking, enable NMI, enable cache before
boot |
| 52 |
Initialize
option ROM's; Initialize and ROM's present at locations C800h
to EFFFFh |
| 53 |
Initialize
time value |
| 60 |
Setup
virus protect |
| 61 |
Set
boot speed |
| 62 |
Setup
numlock |
| 63 |
Boot
attempt |
| B0 |
Spurious |
| B1 |
Unclaimed
NMI |
| BE |
Chipset
default initialization; Program chipset registers and power-on
BIOS defaults. |
| BF |
Chipset
initialization; Reserved |
| C0 |
Turn
off chipset cache |
| C1 |
Memory
presence test; OEM specific, test the size of on-board memory |
| C5 |
Early
shadow; OEM specific, early shadow enable for fast boot |
| C6 |
Cache
presence test; External cache-size detection test |
| E1-EF |
Setup
pages |
| FF |
Boot
loader |
Back to Top
Version
6.0 (i810)

| CFh |
Test
CMOS read/write functionality |
| C0h |
Early
chipset initialization: Disable shadow RAM, L2 cache
(socket 7 and below), program basic chipset registers |
| C1h |
Detect
memory: Auto detection of DRAM size, type and ECC, auto
detection of L2 cache (socket 7 and below) |
| C3h |
Expand
compressed BIOS code to DRAM |
| C5h |
Call
chipset hook to copy BIOS back to E000 & F000 shadow RAM |
| 01h |
Expand
the Xgroup codes located in physical memory address 1000:0 |
| 02h |
Reserved |
| 03h |
Initial
Superio_Early_Init switch |
| 04h |
Reserved |
| 05h |
Blank
out screen; Clear CMOS error flag |
| 06h |
Reserved |
| 07h |
Clear
8042 interface; Initialize 8042 self test |
| 08h |
Test
special keyboard controller for Winbond 977 series Super I/O
chips; Enable keyboard interface |
| 09h |
Reserved |
| 0Ah |
Disable
PS/2 mouse interface (optional); Auto detect ports for keyboard
& mouse followed by a port & interface swap (optional);
Reset keyboard for Winbond 977 series Super I/O chips |
| 0Bh |
Reserved |
| 0Ch |
Reserved |
| 0Dh |
Reserved |
| 0Eh |
Test
F000h segment shadow to see whether it is read/write capable
or not. If test fails, keep beeping the speaker |
| 0Fh |
Reserved |
| 10h |
Auto
detect flash type to load appropriate flash read/write codes
into the run time area in F000 for ESCD & DMI support |
| 11h |
Reserved |
| 12h |
Use
walking 1's algorithm to check out interface in CMOS circuitry.
Also set real time clock power status and then check for overrride |
| 13h |
Reserved |
| 14h |
Program
chipset default values into chipset. Chipset default
values are MODBINable by OEM customers |
| 15h |
Reserved |
| 16h |
Initial
Early_Init_Onboard_Generator switch |
| 17h |
Reserved |
| 18h |
Detect
CPU information including brand, SMI type (Cyrix or Intel)
and CPU level (586 or 686) |
| 19h |
Reserved |
| 1Ah |
Reserved |
| 1Bh |
Initial
interrupts vector table. If no special specified, all
H/W interrupts are directed to SPURIOUS_INT_HDLR & S/W
interrupts to SPURIOUS_soft_HDLR |
| 1Ch |
Reserved |
| 1Dh |
Initial
EARLY_PM_INIT switch |
| 1Eh |
Reserved |
| 1Fh |
Load
keyboard matrix (notebook platform) |
| 20h |
Reserved |
| 21h |
HPM
initialization (notebook platform) |
| 22h |
Reserved |
| 23h |
Check
validity of RTC value; Load CMOS settings into BIOS stack.
If CMOS checksum fails, use default value instead; Prepare
BIOS resource map for PCI & PnP use. If ESCD is
valid, take into consideration of the ESCD's legacy information;
Onboard clock generator initialization. Disable respective
clock resource to empty PCI & DIMM slots; Early PCI initialization
- Enumerate PCI bus number, assign memory & I/O resource,
search for a valid VGA device & VGA BIOS, and put it into
C000:0 |
| 24h |
Reserved |
| 25h |
Reserved |
| 26h |
Reserved |
| 27h |
Initialize
INT 09 buffer |
| 28h |
Reserved |
| 29h |
Program
CPU internal MTRR (P6 & PII) for 0-640K memory address;
Initialize the APIC for Pentium class CPU; Program early chipset
according to CMOS setup; Measure CPU speed; Invoke video BIOS |
| 2Ah |
Reserved |
| 2Bh |
Reserved |
| 2Ch |
Reserved |
| 2Dh |
Initialize
multilanguage; Put information on screen display, including
Award title, CPU type, CPU speed, etc... |
| 2Eh |
Reserved |
| 2Fh |
Reserved |
| 30h |
Reserved |
| 31h |
Reserved |
| 32h |
Reserved |
| 33h |
Reset
keyboard except Winbond 977 series Super I/O chips |
| 34h |
Reserved |
| 35h |
Reserved |
| 36h |
Reserved |
| 37h |
Reserved |
| 38h |
Reserved |
| 39h |
Reserved |
| 3Ah |
Reserved |
| 3Bh |
Reserved |
| 3Ch |
Test
8254 |
| 3Dh |
Reserved |
| 3Eh |
Test
8259 interrupt mask bits for channel 1 |
| 3Fh |
Reserved |
| 40h |
Test
9259 interrupt mask bits for channel 2 |
| 41h |
Reserved |
| 42h |
Reserved |
| 43h |
Test
8259 functionality |
| 44h |
Reserved |
| 45h |
Reserved |
| 46h |
Reserved |
| 47h |
Initialize
EISA slot |
| 48h |
Reserved |
| 49h |
Calculate
total memory by testing the last double last word of each
64K page; Program writes allocation for AMD K5 CPU |
| 4Ah |
Reserved |
| 4Bh |
Reserved |
| 4Ch |
Reserved |
| 4Dh |
Reserved |
| 4Eh |
Program
MTRR of M1 CPU; initialize L2 cache for P6 class CPU &
program cacheable range; Initialize the APIC for P6 class
CPU; On MP platform, adjust the cacheable range to smaller
one in case the cacheable ranges between each CPU are not
identical |
| 4Fh |
reserved |
| 50h |
Initialize
USB |
| 51h |
Reserved |
| 52h |
Test
all memory (clear all extended memory to 0) |
| 53h |
Reserved |
| 54h |
Reserved |
| 55h |
Display
number of processors (multi-processor platform) |
| 56h |
Reserved |
| 57h |
Display
PnP logo; Early ISA PnP initialization and assign CSN to every
ISA PnP device |
| 58h |
Reserved |
| 59h |
Initialize
the combined Trend Anti-Virus code |
| 5Ah |
Reserved |
| 5Bh |
Show
message for entering AWDFLASH.EXE from FDD (optional feature) |
| 5Ch |
Reserved |
| 5Dh |
Initialize
Init_Onboard_Super_IO switch; Initialize Init_Onboard_AUDIO
switch |
| 5Eh |
Reserved |
| 5Fh |
Reserved |
| 60h |
Okay
to enter Setup utility |
| 61h |
Reserved |
| 62h |
Reserved |
| 63h |
Reserved |
| 64h |
Reserved |
| 65h |
Initialize
PS/2 mouse |
| 66h |
Reserved |
| 67h |
Prepare
memory size information for function call: INT 15h ax=E820h |
| 68h |
Reserved |
| 69h |
Turn
on L2 cache |
| 6Ah |
Reserved |
| 6Bh |
Program
chipset registers according to items described in Setup &
Auto-Configuration table |
| 6Ch |
Reserved |
| 6Dh |
Assign
resources to all ISA PnP devices; Auto assign ports to onboard
COM ports if the corresponding item in Setup is set to "AUTO" |
| 6Eh |
Reserved |
| 6Fh |
Initialize
floppy controller; Setup floppy related fields in 40:hardware |
| 70h |
Reserved |
| 71h |
Reserved |
| 72h |
Reserved |
| 73h |
Enter
AWDFLASH.EXE if: AWDFLASH.EXE is found in floppy dive and
ALT+F2 is pressed |
| 74h |
Reserved |
| 75h |
Detect
and install all IDE devices: HDD, LS120, ZIP, CDROM... |
| 76h |
Reserved |
| 77h |
Detect
serial ports and parallel ports |
| 78h |
Reserved |
| 79h |
Reserved |
| 7Ah |
Detect
and install coprocessor |
| 7Bh |
Reserved |
| 7Ch |
Reserved |
| 7Dh |
Reserved |
| 7Eh |
Reserved |
| 7Fh |
Switch
back to text mode if full screen logo is supported: if errors
occur, report errors & wait for keys, if no errors occur
or F1 key is pressed continue - Clear EPA or customization
logo |
| 80h |
Reserved |
| 81h |
Reserved |
| 82H |
Call
chipset power management hook: Recover the text fond used
by EPA logo (not for full screen logo), If password is set,
ask for password |
| 83H |
Save
all data in stack back to CMOS |
| 84h |
Initialize
ISA PnP boot devices |
| 85h |
Final
USB initialization; NET PC: Build SYSID structure; Switch
screen back to text mode; Set up ACPI table at top of memory;
Invoke ISA adapter ROM's; Assign IRQ's to PCI devices; Initialize
APM; Clear noise of IRQ's |
| 86h |
Reserved |
| 87h |
Reserved |
| 88h |
Reserved |
| 89h |
Reserved |
| 90h |
Reserved |
| 91h |
Reserved |
| 92h |
Reserved |
| 93h |
Read
HDD boot sector information for Trend Anti-Virus code |
| 94h |
Enable
L2 cache; Program boot up speed; Chipset final initialization;
Power management final initialization; Clear screen and display
summary table; Program K^ write allocation; Program P6 class
write combining |
| 95h |
Program
daylight saving; Update keyboard LED and typematic rate |
| 96h |
Build
MP table; Build and update ESCD; Set CMOS century to 20h or
19h; Load CMOS time into DOS timer tick; Build MSIRQ routing
table |
| FFh |
Boot
attempt (INT 19h) |
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