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"The computer book of the month is The Bios Companion by Phil Croucher. Long-time readers of this column will recall I have recommended his book before. This tells you everything you ought to know about the BIOS in your system. Post codes, options, upgrades, you name it.

Years ago, I called an earlier edition of this invaluable and I see no reason to change my view. Recommended."

Jerry Pournelle
Byte Magazine

"Croucher's book was invaluable 20 years ago and remains so today...... Every one of the 468 pages holds useful information, the author having zero tolerance for padding."

Davey Winder
PC Plus Magazine

"You've completerly impressed me with the quality and scope of your guides - extreme care has obviously gone into their research and preparation."

Jeremy Fleming

"His style is lovely: clear, jargon-free where possible, chatty and friendly with beautiful short paragraphs. It [Communications & Networks] joins my list of 'I wish I'd written it' books. I haven't come across such a good subject book in a long time at this price."

Lorna Kyle
Personal Computer World

"To any micro owner who wants to know what this comms business is all about, [Communications & Networks] is certainly one of the best around. ... Croucher is not only knowledgable about his subject, he's interested in it and communicates that interest to you. "

Ron Peck
New Computer Express

"There are few books about which explain as accurately and comprehensively as [Communications & Networks] does what communications are all about. The glossary is excellent."

Micro Decision

"...any PC user with a genuine interest in using his machine to its full potential will recognise [Communications & Networks] for the completely invaluable tool and often the inspiration that it is."

Yvonne Taylor
Which PC

"[Communications & Networks] is the type of book you can read on a bus or train without getting a headache from trying to understand what it means."

Network

"As a recently reformed computer illiterate myself, I appreciated the author's straighforward yet humourous and light-hearted style of writing. He manages to strike the balance between too much and too little information. ... [Computing Under Protest] is never in danger of either boring or confusing the reader."

Emma Tyrrall
Practical PC

"Good documentation is important for any software, but even more so for an operating system - the documentation [for DOS 386 Professional] has some exceptionally clear explanations. Altogether, the documentation is an example of the right way of doing things, and other software manufacturers would do well to take note."

Matthew Holbrook
Computer Shopper

"The DOS 386 Professional manual sets arrived at 2130 local time today. We have had a brief look at them and wish to congratulate IMS on the excellent, clear and concise manner in which they have been presented."

Fred Parker
ETL Soft

"I remain impressed by Mr. Croucher's fluid writing style, practical orientation, enthusiasm, and strong technical knowledge."

Lance A Leventhal
Slawson Communications, Inc



JAR Professional Pilot Studies

"Its real value lies in taking the plethora of booklets and ring-bound photocopies associated with commercial examinations and condensing them into an attractive and portable form. The guy really does deserve a medal ~ he has made a genuine contribution to the body of professional aviation literature assembled during the course of the last century.

I heartily recommend it to students of commercial flight, if only as a souvenir of their efforts... "

Colin Hilton
Pro Pilot's Rumour Network

"(The) Book is quite a good compliment to our notes for students. We will be recommending all our students buy the books.... "

Chris
Naples Air Centre

"I got your book last month and am in the process of ploughing through it! Actually, I really like it and find it very interesting and easy to read."

Simon Rouse

"So far I have found your book an extremely helpful reference manual to carry around in my flight bag."

Blair Clubley

"I wish to commend you on a "work of art". I wish the CAA would produce a quick reference easy to read manual such as yours. Truly wonderful!"

Ebrahim Parkar
 
Post Codes
 Acer
 ALR
 AMI
 Arche
 AST
 AT&T
  Award
 Chips & Technologies
 Compaq
 Dell
 DTK
 Eurosoft/Mylex
  Faraday A-Tease
 HP
 IBM
 Intel
 Landmark
 Microid/MR
 NCR 		 Olivetti
 Philips
 Phoenix
 Quadtel
 Supersoft
 Tandon
 Zenith

Phoenix POST Codes

On 4.3 and above, the system will attempt to generate a code with four groups of beeps, with 1-4 per group. The micro channel version sends codes to port 680, with an execution sequence of: 01, 03, 41, 02, 42, 05, 06, 08, 04, 09-22, 23, 25, 27, 28, 29, 2E, 2B, 2C, 2D, 30, 31, 32, 61, 62, 34, 35, 3A, 38, 3B.

Note: Not all POST codes are included below - the latest information is in the The BIOS Companion, which contains over 100 pages of them.


POST Procedures

 

CPU Check internal operations i.e. ALE/IRQ status, Request, LA and memory read/write
CMOS RAM Test with walking bit pattern
ROM BIOS Perform checksum on ROM BIOS where all bits are added and compared to a factory set total
PIT Check to ensure interrupt requests are properly executed
DMA Check DMA from CPU to memory without BIOS.  Also check page registers
Base 64K Check first 4K block
Serial and Parallel Ports I/O data areas for any devices found are assigned but are not tested
PIC Check that proper interrupt request levels are addressed
Keyboard Controller Check 8240 for proper operation, including scan code response and Gate A20 which allows CPU operation in protected mode
CMOS Check data within CMOS and compare to BIOS information.  Failure of the extended area is often due to wrong data setup.   Constant failure after resetting CMOS is either battery CMOS chip or RTC
Video Controller Test and initialize controller and ROM on the video adapter
RTC Check to ensure proper frequencies are on proper lines for the Video Color CPU and DMA frequency.  Check RTC and PIT or the system crystal if a failure occurs
CPU Return from protected mode.  CPU is put into protected mode and returns to the POST at the point indicated by the CMOS ROM data area byte 0F.  Failure here is normally due to the CPU, keyboard controller, CMOS chip or an address line
PIC Test counter 2
NMI Check for non maskable interrupt request vector for active status.  Failure is normally due to the CMOS but could also be the BIOS IRQ or CPU chips
Keyboard Check for NumLock and/or Caps and Shift keys
Mouse Initialize through the keyboard controller.  This is only done if a mouse is present and it is initialized in this way
RAM Above 64K Test in 64KB blocks with a walking bit pattern and parity enabled
Fixed and Floppy Controllers Test for proper response to BIOS calls
Shadow RAM Areas Look in CMOS for settings on which adapter or system ROM's are to be shadowed
Option ROM Look for ROM signatures of 55AA in extended memory then initialize the ROM and halt testing while internal checks are carried out
External Cache Check controller chip for external cache
CPU Internal Cache The CPU's internal cache is tested
Hardware Interrupts Initialize and test video, floppy, hard I/O adapters, serial and parallel ports
Cassette Test internal or external cassette drives
Boot Code Errors Errors occurring after this point are normally a corrupt boot record

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 XT v2.52

 

01 Test 8253 timer
02 First 64K RAM failed
03 First 1K parity check failed
04 Initialize 8259 interrupt controller
05 Second 1K RAM test, BIOS data area, failed

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Plus or v1.0

 

01 CPU register test in progress
02 CMOS read/write failure
03 ROM BIOS checksum failure
04 Programmable interval timer failure
05 DMA initialization failure
06 DMA page register read/write failure
08 RAM refresh verification failure
09 First 64K RAM test in progress
0A First 64K RAM chip or data line failure multi-bit
0B First 64K RAM odd/even parity logic failure
0C Address line failure in first 64K RAM
0D Parity failure in first 64K RAM
10 Bit 0 first 64K RAM failure
11 Bit 1 first 64K RAM failure
12 Bit 2 first 64K RAM failure
13 Bit 3 first 64K RAM failure
14 Bit 4 first 64K RAM failure
15 Bit 5 first 64K RAM failure
16 Bit 6 first 64K RAM failure
17 Bit 7 first 64K RAM failure
18 Bit 8 first 64K RAM failure
19 Bit 9 first 64K RAM failure
1A Bit a(10) first 64K RAM failure
1B Bit B(11) first 64K RAM failure
1C Bit C(12) first 64K RAM failure
1D Bit D(13) first 64K RAM failure
1E Bit E(14) first 64K RAM failure
1F Bit F(15) first 64K RAM failure
20 Slave DMA register failure
21 Master DMA register failure
22 Master interrupt mask register failure
23 Slave interrupt mask register failure
25 Interrupt vector loading in progress
27 8042 keyboard controller test failure
28 CMOS power failure/checksum calculation in progress
29 CMOS configuration validation in progress
2B Screen memory test failure
2C Screen initialization failure
2D Screen retrace test failure
2E Search for video ROM in progress
30 Screen believed running with video ROM
31 Mono monitor believed operational
32 Color monitor (40 columns) believed operational
33 Color monitor (80 columns) believed operational
34 Timer tick interrupt in progress or failed (non-fatal)
35 Shutdown failure (non-fatal)
36 Gate A20 failure (non-fatal)
37 Unexpected interrupt in protected mode (non-fatal)
38 Memory high address line failure at 01000-0A000 (non-fatal)
39 Memory high address line failure at 100000-FFFFFF (non-fatal)
3A Timer chip counter 2 failed (non-fatal)
3B Time of day clock stopped
3C Serial port test
3D Parallel port test
41 System board select bad
42 Extended CMOS RAM bad

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 UMC PCI

 

02 Verify real mode operation
04 Get CPU type
06 Initialize system hardware
08 Initialize chipset registers with initial POST values
09 Set in POST flag
0A Initialize CPU registers
0C Initialize cache to initial POST values
0E Initialize I/O
10 Initialize power management
11 Load alternate registers with initial POST values
12 Jump to user patch 0
14 Initialize keyboard controller
16 BIOS ROM checksum
18 8254 programmable interrupt timer initialization
1A 8237 DMA controller initialization
1C Reset 8259 programmable interrupt controller
20 Test DRAM refresh
22 Test 8742 keyboard controller
24 Set ES segment register to 4GB
26 Enable address line A20
28 Autosize DRAM
2A Clear 512K base memory
2C Test 512K base address lines
2E Test 512K base memory
30 Test base address memory
32 Test CPU bus clock frequency
34 Test CMOS RAM
35 Test chipset register initialize
36 Test check resume
37 Reinitialize the chipset
38 Shadow system BIOS ROM
39 Reinitialize the cache
3A Autosize the cache
3C Configure advanced chipset registers
3D Load alternate registers with CMOS values
3E Read hardware configuration from keyboard controller
40 Set initial CPU speed
42 Initialize interrupt vectors
44 Initialize BIOS interrupts
46 Check ROM copyright notice
47 Initialize manager for PCI options ROM's
48 Check video configuration against CMOS
49 Initialize PCI bus and devices
4A Initialize all video adapters
4C Shadow video BIOS ROM
4E Display copyright notice
50 Display CPU type and speed
52 Test keyboard
54 Set key click if enabled
56 Enable keyboard
58 Test for unexpected interrupts
5A Display prompt "Press F2 to Enter Setup"
5C Test RAM between 512K and 640K
5E Test base memory
60 Test expanded memory
62 Test extended memory address lines
64 Jump to user patch 1
66 Configure advanced cache registers
68 Enable external and CPU registers
69 Set up power management
6A Display external cache size
6C Display shadow message
6E Display non-disposable segments
70 Display error messages
72 Check for configuration messages
74 Test real time clock
76 Check for keyboard errors
7A Enable keylock
7C Setup hardware interrupt vectors
7E Test coprocessor if present
80 Disable onboard I/O ports
82 Detect and install external RS232 ports
84 Detect and install external parallel ports
86 Reinitialize onboard I/O ports
88 Initialize BIOS data areas
8A Initialize extended BIOS data area
8C Initialize floppy drive controller
8E Hard disk autotype configuration
90 Initialize hard disk controller
91 Initialize local bus hard disk controller
92 Jump to user patch 2
94 Disable A20 address lines
96 Clear huge ES segment register
98 Search for option ROM's
9A Shadow options ROM's
9C Setup power management
9E Enable hardware interrupts
A0 Set time of day
A2 Check key lock
A4 Initialize typematic rate
A8 Erase F2 prompt
AA Scan for F2 keystroke
AC Enter setup
AE Clear in-POST flag
B0 Check for errors
B2 POST done
B4 One beep
B6 Check password (optional)
B8 Clear global descriptor table
BC Clear parity checkers
BE Clear screen (optional)
C0 Try to boot with interrupt 19
D0 Interrupt handler error
D2 Unknown interrupt error
D4 Pending interrupt error
D6 Initialize option ROM error
D8 Shutdown error
DA Extended block move
DC Shutdown 10 error

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 PCI

 

02 If the CPU is in protected mode, turn on gate A20 and pulse the reset line.  Forces a shutdown 0.
04 On cold boot, save the CPU type information value in the CMOS
06 Reset DMA controllers; Disable video; Clear pending interrupts from real time clock; Setup port B register
08 Initialize chipset control registers to power on defaults
0A Set a bit in the CMOS that indicates POST; used to determine if the current configuration causes the BIOS to hang.  If true, default BIOS values set on next POST
0C Initialize I/O module control registers
0E External CPU caches initialized; Cache registers set to default values
10/12/14 Verify response from 8742 keyboard controller
16 Verify BIOS ROM checksums to zero
18 Initialize all three 8254 programmable interrupt timers
1A Initialize DMA command register; Initialize 8 DMA channels
1C Initialize 8259 programmable interrupt controller; ICW4 needed; Cascade and edge triggered mode
20 Test DRAM refresh by polling refresh bit in post B
22 Test 8742 keyboard controller; Self test send to keyboard controller and awaiting results; Read the switch inputs from the 8742 keyboard controller and write the keyboard controller command byte
24 Set ES segment register to 4GB
26 Enable address line A20
28 Autosize DRAM
2A Clear first 64K of RAM
2C Test RAM address lines
2E Test first 64K bank of memory by checking chip address line test and RAM test
30/32 Find true CPU speed (MHz)
34 Clear CMOS diagnostic byte (register E); Check real time clock and verify battery; Checksum the CMOS and verify for corruption
36/38/3A External cache is autosized and its configuration for enabling later in POST
3C Configure advanced cache features; Configure external cache's configurable parameters
3E Read hardware configuration from keyboard controller
40 Set system power-on speed to the rate determined by the CMOS; If the CMOS is invalid, use a lower speed
42 Initialize interrupt vectors 0-77h to the BIOS general interrupt handler
44 Initialize interrupt vectors 0-20h to proper values from the BIOS interrupt tables
46 Check copyright message checksum
48 Check video configuration
4A Initialize both monochrome and color graphics video adapters
4C/4E Display copyright message
50 Display CPU type and speed
52 Test for the self-test code if a cold start; Keyboard performs a self-test and sends and AA if successful
54 Initialize keystroke clicker during POST
56 Enable keyboard
58 Test for unexpected interrupts; Check STI for hot interrupts; Test NMI for unexpected interrupts; Enable parity checkers and read from memory checking for unexpected interrupt
5A Display prompt "Press F2 to Enter Setup"
5C Determine and test the amount of memory available; Save total size to BIOS variable called bdaMemorySize
5E Perform address of base memory
60 Determine and test the amount of extended memory available; Save the total size in the CMOS at CMOSExtended
62 Perform and address line test on A0 to the amount of memory available
68 External and CPU caches, if present, are enabled
6A Display cache size on screen if non-zero
6C Display BIOS shadow status
6E Display the starting offset of the non-disposable section of the BIOS
70 Check flags in CMOS and in the BIOS data area to see if any errors have been detected during the POST
72 Check status bits for configuration errors
74 Test real time clock if the battery has lost power
76 Check status bits for keyboard errors; Errors are displayed
78 Check for stuck keys on the keyboard; Errors are displayed
7A Enable keylock
7C Setup hardware interrupt vectors
7E Test coprocessor if present
80/82 Detect and install RS232 ports
84 Detect and install parallel ports
86/88 Initialize timeouts/key buffer/soft reset flags
8A Initialize extended BIOS data area and initialize the mouse
8C Initialize the floppy disks and display error message if failure was detected
8E Hard disk autotype detection
90 If the CMOS RAM is valid and intact and fixed disks are defined, call the fixed disk initialization routine to initialize the fixed disk system and take over the appropriate interrupt vectors
92/94 Disable gate A20 address line
96/98 Scan for ROM BIOS extensions
9E Enable hardware interrupts
A0 Set time of day
A2 Setup numlock indicator
A4 Initialize typematic rate
A6 Initialize hard disk autoparking
A8 Erase F2 prompt
AA Scan for F2 keystroke
AC Check to see if SETUP should executed
AE Clear ConfigFailedBit and InPostBit in CMOS
B0 Check for POST errors
B2 Set/clear status bits to reflect POST complete
B4 One beep
B6 Check for password before boot
B8 Clear global descriptor table
BA Initialize the screen saver
BC Clear parity error latch
BE Clear screen
C0 Try to boot with interrupt 19
D0/D2 If an interrupt occurs before interrupts vectors have been initialized, interrupt handler will check if 8259 programmable interrupt timer caused the interrupt and which one; If error is unknown, InterruptFlag will be FF, otherwise, it will hold the IRQ number that occurred
D4 Clear pending timer and keyboard interrupts and transfer control to the double word address located at RomCheck
D6/D8/DA Return from extended block move

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 ISA/EISA/MCA v3.07

 

01 CPU register test in progress
02 CMOS read/write failure
03 ROM BIOS checksum failure
04 Programmable interval timer failure
05 DMA initialization failure
06 DMA page register write/read failure
08 RAM refresh verification failure
09 First 64K RAM test in progress
0A First 64K RAM chip or data line failure multi-bit
0B First 64K RAM odd/even logic failure
0C Address line failure in first 64K RAM
0D Parity failure in first 64K RAM
0E Fail-safe timer failure
0F Software NMI post failure
10 Bit 0 first 64K RAM failure
11 Bit 1 first 64K RAM failure
12 Bit 2 first 64K RAM failure
13 Bit 3 first 64K RAM failure
14 Bit 4 first 64K RAM failure
15 Bit 5 first 64K RAM failure
16 Bit 6 first 64K RAM failure
17 Bit 7 first 64K RAM failure
18 Bit 8 first 64K RAM failure
19 Bit 9 first 64K RAM failure
1A Bit A first 64K RAM failure
1B Bit B first 64K RAM failure
1C Bit C first 64K RAM failure
1D Bit D first 64K RAM failure
1E Bit E first 64K RAM failure
1F Bit F first 64K RAM failure
20 Slave DMA register failure
21 Master DMA register failure
22 Master interrupt mask register failure
23 Slave interrupt mask register failure
25 Interrupt vector loading in progress
27 Keyboard controller test failure
28 CMOS power failure; checksum calculation in progress
29 CMOS RAM configuration validation in progress
2B Screen memory test failure
2C Screen initialization failure
2D Screen retrace test failure
2E Search for video ROM in progress
30 Screen believed running with video ROM
31 Mono monitor believed operational
32 Color monitor (40 columns) believed operational
33 Color monitor ( 80 columns) believed operational
34 No time tick
35 Shutdown test in progress or failure
36 Gate A20 failure
37 Unexpected interrupt in protected mode
38 Memory high address line failure at 01000-0A000; RAM test in progress or address failure >FFFh
39 Memory high address line failure at 100000-FFFFFF
3A Interval timer channel 2 test or failure
3B Time of day clock test or failure
3C Serial port test or failure
3D Parallel port test or failure
3E Math coprocessor test
3F Cache test (Dell)
41 System board select bad (Micro Channel only)
42 Extended CMOS RAM bad (Micro Channel only)

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 Version 4.0

 

02 Verify real mode
04 Get CPU type
06 Initialize system hardware
08 Initialize chipset registers with initial POST values
09 Set in POST flag
0A Initialize CPU registers
0C Initialize cache to initial POST values
0E Initialize I/O
10 Initialize power management
11 Load alternate registers with initial POST values
12 Jump to UserPatch0
14 Initialize keyboard controller
16 BIOS ROM checksum
18 8254 programmable interrupt timer initialization
1A 8237 DMA controller initialization
1C Reset 8254 programmable interrupt timer
20 Test DRAM refresh